/* Zhao Zongyi, xinshengzzy@foxmail.com, 2020.12.31 */
#include <tofino/constants.p4>
#include <tofino/intrinsic_metadata.p4>
#include <tofino/primitives.p4>
#include <tofino/pktgen_headers.p4>
#include <tofino/stateful_alu_blackbox.p4>
#include <tofino/wred_blackbox.p4>

#include "includes/fieldlists.p4"
#include "includes/headers.p4"
#include "includes/metadata.p4"
#include "includes/parsers.p4"
#include "includes/registers.p4"
#include "includes/tables.p4"


/*---------- ingress ----------*/
/* It seems that at most four MA tables accessing the registers are allowed in each stage. */
control ingress {
  apply(forward_t);
  if(ipv4.srcip == 0x0a00000a) {
    apply(update_counter1_t);
    apply(update_counter2_t);
    apply(update_export_flag_t);
  }
}

/*---------- egress ----------*/
control egress
{
}
